Eric Bogatin’s Blog: What I Learned This Month

Check out our next public classes: Essential Principles of Signal Integrity and Advanced Signal Integrity Design, Oct 11-14 in Hillsboro, OR.

Check out our next No Myths Allowed Webinar, “Link Analysis with Return Path Discontinuities”, presented free on July 7, 1 pm EDT.

“Ten orders of magnitude in productivity gains in half a century,” is how Tom Di Stefano, one of the founders of Tessera, started out his keynote address to the International Wafer Level Packaging Conference, Oct 15, 2008. If you missed his talk, you can read the transcript.

The consumer products we enjoy today are all based on riding Moore’s Law, which is really driven by the integration made possible by photolithography and processing whole wafers of chips.

Tom argues that historically, packaging technology has not really contributed much to this cost-performance curve. It’s been dominated by mechanical processing: stamping lead frames, singulation of chips and individual processing. That is, until the introduction of Wafer Level Packaging (WLP) in the last 15 years.

WLP has the potential of applying the integration advantages of IC processing to packaging, enabling chip scale packages that can ride the cost-performance curve that silicon chips have enjoyed. If the techniques associated with the back end of chip manufacture: assembly, packaging and test, are of interest to you, you’ll want to check out the new journal, “Microconnections” available in print and on-line.

I occasionally write a column in this journal, focusing on signal integrity issues associated with packaging and test. My last column addressed the question of  the Impedance of a test pin in a socket and my next column is about S-parameters.

If you want to get involved in this field, you’ll want to check out the list of conferences coming up by clicking here and see the most complete list I’ve come across anywhere online.

Enjoy the next issue.

Our next No Myths Allowed webinar, July 7, 1 pm EDT, “Link Analysis with Return Path Discontinuities”. Details and registration available at www.beTheSignal.com

The last pop quiz was: True or false: getting the differential S-parameters are difficult because they require a special differential network analyzer.

The correct answer is False. 99.99% of all VNAs are single ended VNAs and they are perfectly fine at measuring differential S-parameters. With a little matrix math, the single-ended version can be converted into the differential version. This is valid for all linear, passive interconnects.

While many of you got the correct answer, a significant faction, 20%, answered True. This is why the webinar we presented on May 6, NMA-810 S-parameters, Signal Integrity and You, was so important. We looked at what are S-parameters, what they tell us about interconnects and how we transform single-ended S-parameters into differential S-parameters.

A 4-port VNA is really the best tool to get the differential S-parameters. We can take the 16 single-ended elements and transform them into the 16 differential S-parameters, which include not just the behavior of the channel to differential signals but also to common signals and mode conversion by the interconnect.

If all you have is a 2-port VNA, it’s possible to measure the differential S-parameters by performing multiple measurements with different connections and with the other ports terminated. Another option is using a balun. This is great if all you want are the differential elements in the upper left quadrant: SDD11, SDD22 and SDD21. The use of a 10 GHz balun from Picosecond Pulse Labs is also described in the webinar.

If you missed the live event, you can catch it in the archives.

If you enjoyed this quiz, check out the new pop quiz at www.beTheSignal.com

Our next No Myths Allowed webinar, July 7, 1 pm EDT, “Link Analysis with Return Path Discontinuities”. Details and registration available at www.beTheSignal.com

“The space shuttle solid rocket boosters were designed the way they were because of a horse’s ass,” is the way the legend goes. There is actually some basis of fact in this legend. For the details, check out the article in snopes.com.

Even if only partially true, there is insight in this story that can be applied to many other cases of the origin of specs.

The story goes that the width of Roman chariots was defined in terms of the width of two horses side by side- basically the width of their asses. As the Romans conquered most of Europe and England, they brought their chariots, and their roads with them.

Over time, the wheels dug ruts. As new wagons were introduced, they were built with the same axle spacing because this is what the infrastructure supported and to be backward compatible with the existing ruts. After all, there is still a fundamental limit to how close you can get a couple of horses, so this axle size is not so unreasonable.

When the first railroads were built, the cars used were based on current carriage technology, which had an axle spacing of 4 ft, 8.5 inches. The early trains were even called “iron horses.” Once established, this standard proliferated and the railroad car axle and railroad tracks were standardized at 4 ft, 8.5 inches.

When Thiokol was designing the diameter of the solid fuel booster, so the legend goes, they had to limit its OD based on fitting on a railroad car, which is limited by the axle pitch, which is limited by a pair of horses asses.

Is 4 ft, 8.5 inches the ideal axle span spec? I have no idea. This spec is used to be backward compatible with the existing infrastructure. Unless you want to start from scratch, all rail car axles need to be this length. If there is no compelling reason otherwise, this spec may be acceptable.

When considering a new product, you should always ask two important questions: is it important to be backward compatible, and is there a compelling reason to consider alternative values, as in a better cost-performance balance?

There are two specs in the circuit board industry where it is important to consider these questions; board thickness and differential impedance.

I recently read a really interesting piece Lee Ritchey wrote in Circuitree Magazine about the origin of the board thickness spec of 063 mils.

He points out that the original “circuit boards” were made of plywood and were designed to provide a mechanical support for vacuum tubes and other large components. As the leads were short, the thinnest plywood was used, 1/16th of an inch, which is 063 mils. Plywood evolved into Bakelite, which evolved into fiber glass. The same thickness of 063 mils was used in each generation because that was what was used before. As edge card connectors were introduced, they were design for 063 which locked the standard in for compatibility.

With the introduction of many layers, they all would not fit in 063 mils so a new standard was introduced at 1.5 x 063 or 93 mils.

He rightly asks, is there a performance reason for 063? If you don’t need the thickness for mechanical support or edge connector compatibility, is it still the right thickness to use in your application? Not if it costs more.

The same question should be asked about 50 ohms single-ended or 100 Ohm differential impedance. As I wrote about recently, 50 Ohms had its origin 70 years ago as a way of minimizing attenuation in coax cables for radar and radio applications.

If your application is high speed serial links, you still have a need for optimized design for low loss, but in PCB geometries, 100 Ohms is not the optimum value. As we describe in some of our classes, lower impedance has lower loss. Intel has recommended 85 Ohm differential impedance for PCI gen II operating at 5 Gbps. It has lower loss and is a better match to the typically 70 Ohm differential impedance of through vias in a thick circuit board.

Many connector companies, such as Molex in their Impact series, are offering connector options at 85 Ohms. It will become the new standard.

This may not be the right answer for every design, as the lower differential impedance may mean higher power consumption. All of life is a trade-off and that’s why engineers need to be empowered to make their own decisions about their specific, custom products.

Sometimes it is useful to take a step back and look at why the specs we use are the value they are, and if there is a compelling reason, change them to help find a better cost-performance balance.

Our next No Myths Allowed webinar, July 7, 1 pm EDT, “Link Analysis with Return Path Discontinuities”. Details and registration available at www.beTheSignal.com

On Tues, I walked the floor of the Sensors Expo in Chicago and came away with a new understanding of the coming importance of sensor “motes”.

Motes, small, remote sensor nodes as part of a larger network of distributed sensors, have been around for a while. Pictured at left is an example of a mote from Powercast.

At this conference, I saw a harmonic convergence of four technologies and two important killer apps that I think will accelerate the development and implementation of sensor motes.

Energy harvesting or scavenging, is the technology of taking “waste” or local fluctuations in energy from the environment and collecting and storing it in a battery or large capacitor for later use.

I saw a number of companies showing off savaging techniques, leveraging, random vibrations, using piezo-electric transducers which convert vibration into voltage, tiny wind turbines which convert a gentle breeze into electricity, thermopiles which convert a small temperature gradient into a voltage, small solar cells which convert low light levels into voltage and even rectifiers that harvest energy from the local EM noise.

The local storage is a small, typically either thin film or polymer based solid state rechargeable battery that could be recharged thousands of times. Regulating the energy conversion and the charging as well as the output voltage is a tiny, ultra low power ASIC chip.

This combination acted as a local power source for an ultra low power microcontroller, with power consumption measured in the microwatt range. TI was showing off their MSP430 series microcontroller with less than 1 microA standby current.

The microcontroller measures the output from a variety of sensors such as humidity, temperature, voltage, vibration, light level, proximity, rotation, tilt, B field, or acceleration.

Connected to the microcontroller and using the local power source is a micro power wireless transceiver, using either a Zigbee, 802.11x or even a proprietary standard.

This combination of four technologies enables a standalone, remote sensor node which, with the right software, can self-assemble into a highly linked network communicating between each other and a base station over long distances. Once set up, the node never needs servicing, never needs a battery changed, never needs replacement. They can be located in remote, inaccessible locations and forgotten.

The two applications that were talked about the most at the conference were environmental monitoring in commercial buildings and monitoring of the future smart power grid. Both applications apply to improving our energy efficiency. Given the number of nodes that might be used in a building and the number of buildings, and the number of nodes along the proposed smart grid, the unit volume of motes could be in the billions.

Will this technology be what fuels the next killer app for the electronics industry?

Our next No Myths Allowed webinar, May 6, 1 pm EDT, “S-Parameters, Signal Integrity and You”. Details and registration available at www.beTheSignal.com

At DesignCon 2009, the paper I co-authored with Bert Simonovich, Mike Resso and Sanjeev Gupta, won a best paper award. It was titled “Practical Analysis of Backplane Vias.”

You can download a copy of the paper, which is BTS107, from our web site. I also expanded on this topic in the April 2009 issue of Signal Integrity Insights, available on our web site.

Bert had constructed a number of via and signal trace structures in a 26 layer board and did 4-port VNA measurements of the channels which included two sets of vias and a uniform stripline interconnect between them. We all collaborated in analyzing the measurements and building simple topology based circuit models to describe them.

Two aspects of this project surprised me, both relating to how complex structures can often have very simple descriptions even to bandwidths exceeding 10 GHz.

The stripline structures were simple uniform lines, with pre-preg on one side and core laminate on the other. Using the Park Nelco dielectric calculator, Bert dialed in the glass weave construction and the resin type and the calculator spit out the Dk and Df values.

Using the built in 2D boundary element field solver in ADS, we matched the measured stripline performance with the predictions based on the material properties. (For an analysis of the accuracy of the ADS and Polar Instruments field solver based transmission line analysis tools, see the Signal Integrity Insights issue for Jan, 2009).

The agreement between the predicted Dk and what we measured was within about 1-2%. If you know the laminate composition, the materials vendors can provide very accurate Dk values. Often, the reason the actual Dk value provided by a fab house is off from what is measured is because the construction is not tracked, or a general number is provided rather than the as-fabricated construction.

Of course the dissipation factor value, 0.008, was way off from what we measured. The extracted value from the measurement was actually 0.02. I routinely find the as-measured Df in completed boards is always higher than the specified values. I have heard many other folks also report this same behavior.

The second startling result from this project is how a relatively complex structure like a differential via, going through 26 layers, with variable length through part of via stub, and with an adjacent return via can be described with so simple a model as a differential pair for the top and bottom segments.

In fact, the value of the differential impedance was very closely matched by the simple analytical estimate of twin rods. However complicated the actual physical structure might be, long vias in backplanes can behave as simple electrical structures and simple circuit models can be used to predict their behavior.

OF course, to get the simple model just from the desing, before you “build it and test it”, with the complication of clearance hole size, non function pads, thick power planes, and capture pads, a 3D field solver is an essential design tool. But, once you have the S-parameter performance, you can fit a simple differential pair model to it and use the model as a scalable tool in circuit simulations. This model allows you to simulate the behavior of any via between any layers, just given the layer position. This way, you don’t have to run 26 different 3D solutions.

This is further confirmation that Einstein’s principle, “Everything should be made as simple as possible, but not too simple,” applies very well to signal integrity analysis.

Our next No Myths Allowed webinar, May 6, 1 pm EDT, “S-Parameters, Signal Integrity and You”. Details and registration available at www.beTheSignal.com

Mike Resso, my long time collaborator of more than 15 years, and I have recently finished a book published by the IEC, “Signal Integrity Characterization Techniques“.

This book focuses on TDR and VNA measurement techniques and the use of S-parameters for signal integrity applications. We pulled together about 25 papers presented at DesignCon which Mike and I have authored or co-authored and supplemented them with five application notes I wrote for Agilent.

Unlike the papers, which are typically at an advanced level, these application notes start with the basics and explain, step by step how to interpret measurements in either the time or frequency domain and as either single-ended or differential signals.

If you deal with TDR or VNA measurements or need to know about S-parameters, this is a great resource. It will get you up to speed and enable you to understand the sophisticated measurements and analysis techniques used throughout the industry by the leaders in signal integrity.

We hope you enjoy it. Additional articles on this topic can also be found on my web site.

Mark your calendars for our next No Myths Allowed webinar, scheduled for Wed, May 6, 2009 at 1 pm EDT. Like all of our webinars in this series, it will last about 45 minutes with 15 minutes for Q&A and be well worth your time.

This one is entitled, “S-Parameters, Signal Integrity and You.” In 45 minutes, we will introduce the most important features of S-parameters, starting at the very beginning and exploring some of their features and why they are becoming the defacto standard to describe the high frequency behavior of interconnects.

I’ve started a list of the questions we will address in our brief 45 minutes. If you have another question important to you not on the list, drop me a note and I will consider adding it to the webinar. Here is what we will cover:

• What are S-parameters?
• Why should I care?
• Where do they come from?
• How are they simulated?
• How are they measured?
• How accurate are they?
• How do I look at them?
• What’s the deal with differential S-parameters?
• How do I measure differential S-parameters?
• What can I learn about an interconnect from them?
• What can I do with them?
• What are some of the common pitfalls I should watch out for?
• What are some of the resources I can leverage to get more value from S-parameters?

You must sign up by May 4th, in order to attend. We will send out an email note with the access information the day before the webinar. The webinar will be recorded and posted to our website, along with all our other video recordings, and available to all paid subscribers the day after the presentation.

Hope to see you in cyberspace!

Our next No Myths Allowed webinar, May 6, 1 pm EDT, “S-Parameters, Signal Integrity and You”. Details and registration available at www.beTheSignal.com

Fiber weave induced skew in high speed serial links is a serious problem at 5 Gbps and above, but a new option from Dielectric Solutions may dramatically reduce this problem. Their solution, NovaSpeed 1080,  is a new low Dk glass fiber woven into a flatter fabric.

At IPC Expo last week, I had a chance to chat with John Kuhn, VP of Technology at Dielectric Solutions. You can watch my interview with him which I did for Real Time with IPC. This is a topic I’ve written on a number of times in the past. Here’s what I learned from John.

Glass weave induced skew arises when signals in the two lines that make up a differential pair travel at different speeds due to local variations in the dielectric constant they see. The dielectric constant variation is due to the higher dielectric constant of the glass weave, typically 6-7, compared to the resin, typically 3-3.5, and its bunching into fiber bundles. This is illustrated in the figure above.

If one line in a pair happens to be closer to a fiber bundle than its partner line, it will see a higher dielectric constant and travel slower than its partner. By the time the two signals come out the end of equal length lines, the slow path will be delayed compared to the faster path and there will be time delay skew between them.

This skew causes an asymmetry between the signals in the two lines and converts some of the differential signal into common signal, distorting the rise time of the differential signal, causing ISI, collapse of the eye and deterministic jitter.

In FR4 systems the typical glass weave skew varies depending on the weave pitch, the line to line pitch and the glass weave. While it may run to a worse case of 10 psec/inch, it may typically be 2-4 psec/inch. By its nature, the effect of glass weave skew is statistical.

The spec for the worst case acceptable skew is usually about 10% of a unit interval. At 5 Gbps, in PCIe Gen II, for example, the unit interval is 200 psec and the maximum acceptable total skew is less than 20 psec. This means that it is easily possible for the two lines that make up a differential pair to violate a skew spec after running only 5 inches or less.

It doesn’t mean no pairs will work longer than 5 inches. Weave induce skew is a statistical problem and depends on the random alignment of the signal track precisely over the worst case of the glass weave tracks. But, if you build enough boards with enough lines, some of them are bound to show excessive skew, and show a high bit error rate.

Fiber skew is one of the hardest problems to debug. Its signature is poor eye opening in one channel while an adjacent channel is just fine. Or, all the paddles cards in a collection might work but not in all combinations with a specific backplane. If you see these problems, suspect fiber weave induced skew as the root cause.

While there are a number of design based solution, a new technology solution is available that should be added to your tool box. Dielectric Solutions has introduced a new type of glass fabric which dramatically reduces the fiber weave skew effect. Their solution comes from two innovations.

They formulate their own glass, melt it down, extrude it into glass fiber and weave the fiber in a fabric. This gives them complete control over the entire glass fabric process. They’ve formulated a new low Dk glass with a dielectric constant of about 4.5, compared to the standard E glass with a dielectric constant of 6.8.

Second, they weave this fiber into a flat fabric so there is little lateral variation in the glass density. This combination means significant reduction in the glass weave skew. While FR4 and E glass combinations might show a maximum skew of 10 psec/inch, the worst case skew with the low Dk spread glass fabric is less than 1.6 psec/inch. This means much more margin in current systems, and enabling higher bandwidth systems when fiber skew sets the limit.

In the quest for higher bit rates and longer runs, the NovaSpeed fabric from Dielectric Solutions is an exciting alternative that can dramatically improve performance. One less problem for the high speed signal integrity engineer to worry about.

Hope to see you in Cyberspace at our next webinar!

I give about 20 lectures around the world each year and get a chance to meet many of the folks I correspond with by email. If you missed the live presentation I give, you now have a chance to view a recording of the lecture.

All our recorded lectures are available to paid subscribers. Feel free to browse the list on our web site. As I give new lectures, I will try to record them and post them as well. We have about 12 recorded lectures on the web site now, and hope to have more than 20 by the end of the year.

If you are not a paid subscriber, you can still download a copy of the handouts to many of my lectures. Browse the list of lectures on our web site.

There is no substitute to being there, but when travel is restricted, sometimes its just not possible to directly participate. Now you have an alternative.

I hope to see you there!

Our next No Myths Allowed Webinar: “S-Parameters, Signal Integrity and You”, May 6, 2009 1 pm EDT. Details are at www.beTheSignal.com

Last month’s pop quiz was:

“To build a transparent differential via, what is the most important feature to engineer?”

Here are the results from 180 participants.  While the most common answer to all signal integrity questions is “it depends”, it’s not always the best answer. In the case of transparent vias, the limitation is really the via stub. The correct answer is the fourth one, minimize the stub length, which 23% of you correctly answered.

All of the other factors are important. but the one with the biggest impact and which limits the bit rate of signals transmitted down the interconnect, is the length of the via stub. As a rough rule of thumb, the maximum stub length, in mils, that can be used in an interconnect system to transmit a bit rate, BR, in Gbps, is roughly:

Len < 300 mils/BR.

For the details on this and other properties of differential pairs, check out the last No Myths Allowed webinar, “NMA-800 Practical Differential Pair Design”. The handouts are available for download, and if you missed the live webinar, you can view the recording from our web site, www.beTheSignal.com.

And don’t miss our next No Myths Allowed webinar, “S-Parameters, Signal Integrity and You” on May 6 at 1 pm PDT.  I’ll see you there!