What I Learned this Month

“At 25 Gbps, everything makes a difference,” Dave Dunham told the crowd gathered for the 2nd Front Range Signal Integrity Seminar Series held in Longmont, CO on May 9, 2013.

Dave, the Director of Signal Integrity Engineering at Molex, outline the process Molex uses in designing connectors for ultra high speed, where simultaneous mechanical and electrical requirements push the envelop of what is practical.

He outlined a five step process and walked through a few examples.

The first step is establish a few simple figures of merit or rules of thumb. For example, usually the design goal is at the Nyquist frequency of the application data rate. The specs for return loss are typically less than –12 dB and for near end cross talk, less than –40 dB.

The second step is generating concept mechanical and electrical models. These are the basis for stress-strain curves and initial electrical performance.

The third step is feedback from all the team- mold engineering, stamping, assembly tooling, plating and marketing. This cycle of concept design- multi-disciplinary review feedback and re-design, continues a few cycles until a near final design converges.

In the fourth step, the final design is released. This is the best approximation to what will deliver the performance, reliability and manufacturability requirements. When it costs more than $100k for a mold to test out a design, simulation analysis tools are leveraged to explore virtual prototypes, rather than using the build it and test it approach.

This means it’s important to have confidence in the analysis tools that they will accurately predict the measured performance of a part once built. A design of experiments (DOE) study of the virtual prototype is a key element. This identifies the most important design variables and where attention needs to be focused for robust manufacturing.

The fifth and final step is verifying the design and creating the deliverables. For many customers, the board design is just as important in determining the connector performance as the connector itself. Dave’s team provides engineering support to help customer optimize the board design based on the specific details of the connectors.

If you would like to hear the details of how Dave implements this process for the highest performing connectors in the Molex portfolio, you can watch the complete recording and download a copy of his slides on the www.beTheSignal.com web site.

While  you are there, you can also watch the recording of Jeff Loyer’s presentation from March 7, 2013.

If you are in Longmont, join us for the live Front Range Signal Integrity Seminar Series. All these events are always free. I hope to see you there!

My latest feature article posted on the Test and Measurement World web site and the EDN Online web site, offers an example of how to characterize a high density interface.

In this  project, I worked with Gordon Vinther at Ardent Concepts. They have a pretty cool interface, the Omniprobe-R, that enables contacting an array of micro coax cables to any footprint, like a BGA.

This can be used to either test an active BGA in a load board test application or when it is attached to a product board.

Their interposer technology can also interface between an array of coax cables and a high density array of pads on a circuit board. This sort of technology is essential when testing motherboards with high speed serial links.

In our paper, we looked at the high speed performance of two cable interfaces connected together with their compliant interposer. The 4-port measurements were done to 20 GHz using a Teledyne LeCroy SPARQ. We walk through these measurements and show how to interpret the results and display them in a way to get immediately useful information.

The punch line is that the Ardent interposer is pretty darn transparent. Check out the feature article for the details.

If you want to learn more about interpreting S-parameter measurements, you’ll want to check out the next S-Parameters for SI 2-day class we have coming up in late Feb 2013. Hope to see you there!

There are two clear trends in all high speed interfaces, such as PCIe, SAS, Infiniband and even DDR memory: data rates are currently in the gigabit regime and there is a roadmap that requires the current data rates to operate at even higher data rates in the next generation.

As we all know, as data rate increases, signal integrity effects get worse and luck goes down.

If you want to get some insight into the design strategies and tactics to manage the transition to the next higher data rate, you’ll want to watch this webinar I moderated in late Aug, 2012. This topic is one of the themes in our new class: Advanced Gigabit Channel Design (AGCD). For more information, check out our web site.

In my role as contributing editor for EDN, in this webinar, I moderated a panel of three industry experts: Jim Nadolny of Samtec, Brad Griffin of Cadence and Allen Tung of NXP. I posed them three questions about the problems, strategies and tactics of higher data rate system design and we discussed the answers.

There were a number of key points that came out. Here is a brief teaser.

Brad Griffin: for shorter time to the correct design, it’s critical to integrate analysis as part of the layout and design flow. This includes not just reflections, cross talk and losses, but also “power aware” analysis.

Allen Tung: USB 3.0 operating at 5 Gbps will see significant eye closure due to the losses in the boards and cables in typical applications. One way of opening eyes and minimizing the impact from the interconnects is adding a re-driver or repeater chip in the signal path, typically placed at the edge of the board. This does not require any changes to the rest of the circuit.

Jim Nadolny: As a good rule of thumb, the eye will probably be sufficiently open with no equalization if the insertion loss at the Nyquist is no more than –7 dB. There should be about 20 dB SNR so the acceptable cross talk should be less than about –25 to –30 dB in this case. Using pre-emphasis only, you can recover an acceptable eye with about –12 dB insertion loss at the Nyquist. And with FIR, CTLE and DFE, you can recover an acceptable eye with about –25 dB insertion loss at the Nyquist.

You can read a longer review of this webinar by Richard Goering, posted here. And, you can view the entire webinar, recorded and posted here.

If you have suggestions for future webinars, drop me a line!

Every now and then, as I walk the floor of a trade show, a product or booth really catches my attention. At this show, I was stopped in my tracks when I saw the EMI Avengers, in battle with Evil EMI. Leading the Avengers was Eriko Yamato, as Wonder Woman.

Once she got my attention, her gentle, persistent tug would not let me go until I learned about the latest product Tech-Dream added to their distribution list, EM-ISight. This is a new near field scanning tool which moves a robotic arm in 3D around the surface of a functioning board, “sniffing” the near field at frequencies from 10 kHz to 40 GHz.

Hotspots in the local electromagnetic field at any frequency can be mapped over the product surface and even superimposed over a photo of the product to identify potential high field regions.

Of course, as Eriko points out, it’s always important to not confuse the near field with the far field. Sometimes a local near field hotspot is just a local hot spot and does not contribute to radiated emissions.

But a tool like the EM-ISight will give you a new window into the currents flowing on your board. And more information is always a good thing.

Millions around the world counted down the “seven minutes of terror” as we all followed each step of the Mars Science Laboratory (MSL), named “Curiosity”, execute the final steps of its landing on Mars.

The mission control room at the Jet Propulsion Laboratory, part of Caltech, in Pasadena California, was broadcast live. I joined over 300 spacecraft engineers, families, students and just plan space enthusiasts at the Laboratory for Atmospheric and Space Physics (LASP) on the University of Colorado campus at Boulder, CO, to watch this historic landing.

We held our collected breaths, along with mission control engineers, as the spokesman called out, in that calm tone NASA engineers have become famous for, the completion of each phase of the landing. Dr. David Brain, of LASP, called this step, “the riskiest and most difficult landing of any spacecraft yet.”

“re-entry is begun”
“parachute deployed”
“heat shield jettisoned”
“powered flight begun”
“decent speed 50 m/sec, 500 m altitude”
“standby for sky crane”
“40 m altitude”
“sky crane started”
“landed!”

Cheers erupted both at the JPL mission control and throughout the LASP building with the shout of “Curiosity has landed”. Dr. Bruce Jakosky, also of LASP, mission leader for the MAVEN Mars mission, the follow-on to Curiosity, schedule for launch in late 2013, was not as concerned as the rest of us.

“This is the most well planned, executed and tested spacecraft of all Mars missions. The risk is if Mars throws us a curve, like a freak wind gust.” It is more than than the $2.5B cost of the rover at risk at this moment, Jakosky said, “it is the thousands of engineers who worked for more than ten years to make this spacecraft mission successful. But if the Mars environment is within the parameters we designed to, we should have no problems in the landing.” He was proven correct.

How surreal this moment was. The Curiosity had either landed safely or crashed on Mars. What happened had already happened, but we would not know about it until the the telemetry signal traveled the more than 150 million miles to us, imposing a 14 minute delay on our knowledge of events.  This was a perfect real world example of the definition of simultaneity in special relativity. Two events, separated by some distance, are simultaneous when the information can travel from one location to the other.

The tension was not over yet. The next critical step in the Curiosity mission was the first image from the rover. Only one part of the MSL mission is to send back mages, but the wide field fisheye camera was the first instrument package turned on.

The cry erupted from one of the mission control engineers, “We have thumbnails!” As the image appeared on the screen and the world puzzled over the dark, distorted image,  someone at JPL shouted, “It’s a wheel!”

Sure enough, in the lower right corner you can make out one of the six wheels of Curiosity, sitting on the Martian soil.

Later that morning, NASA released a higher resolution and fully processed version of this first image, showing the wheel and the Martian landscape at the Gale Crater landing zone.  To the sharp eye, a small section of the spring used to push off the camera dust cover appears in the very lower right corner of the image.

Of course, some mission control engineers said it was all about the peanuts. This first few Mars Mariner missions were failures, until, that is, one of the mission control engineers happened to be eating from a jar of peanuts during the landing. The mission success was attributed to the peanuts.

Since then, it is traditional for jars of peanuts to be distributed right before the critical landing of any mission. And it seems to be working.

Now the real science begins.

Measurements are the anchor to reality. There is no substitute for building something and measuring it. However, a good simulator can often get you to an acceptable answer quickly by helping you answer “…it depends” questions and explore design space.

We often refer to the results of a simulator as a “virtual prototype”.

Of course, whenever you use a simulator, it’s important to practice “safe simulation”. I describe this as my rule #9, from my list of ten rules:

rule #9: Never do a simulation or measurement without first anticipating the result. If you are wrong, there is either something wrong with your intuition or with the set up of the tool or with the tool itself. Either way, by exploring the difference, you will learn something important. If you are correct, you get a nice warm feeling that you might actually understand something.

With this perspective, I think it is critical for every electrical engineer to have a simulator handy and use it to quickly answer “it depends” questions. A numerical simulator is just one of the three analysis tools every engineer should use. All three: rules of thumb, approximations and numerical simulation tools, are equally important and each have their own balance between accuracy and effort to get an answer.

Unfortunately, many questions involving impedance, reflections or transmission lines are too complicated to get even a reasonably accurate answer using rules of thumb or approximations and numerical simulation is essential.

I’ve explored many free versions of SPICE and have found QUCS to be the best tool for signal integrity problems. This is why I use it in all of my classes and feature it in some of our hands on labs.

At the 2012 IEEE EMC Symposium, I gave a presentation introducing QUCS and created five simple, yet valuable examples of QUCS circuits. These circuit files, as well as an executable version of QUCS, are available for free download from my web site.

If you want to accelerate up the signal integrity learning curve, I strongly suggest you take a look at QUCS. Of course, it doesn’t do everything you may want, like HyperLynx or ADS or Simbeor, might do, but it’s free!

QUCS should be one of the important tools in every engineer’s tool box to help you get to the correct answer, faster.

In the Dec 1993 issue of Surface Mount Technology Magazine, I published an invited article on “Packaging to the Year 2000.” A few years ago, SMT Magazine was taken over by Iconnect007 and is available online.

But my article was published before the days of the internet and was never posted to the web. I just posted a pdf copy on my web site, where you can download a copy.

In a past life, I specialized in semiconductor packaging technology, working in printed circuit fabrication processes, monitoring and control of board fab process, multi chip module technology development and BGA implementation. And I wrote a number of books on interconnect technology.

I wrote this article to paint a picture of where I thought packaging technology would end up in the 21st century, about 7 years out at the time.

I came across it recently when cleaning out some files and was surprised at how timely many of my comments were. Here is a sampling of my comments and predictions, which I think apply just as well today, twenty years later.

“There will be no universal packaging solutions for every customer. Rather the industry will be comprised of niche markets.”

“With such technologies on hand, many of the products we use today- day-timers, maps newspapers, TVs, libraries, video stores- will also become extinct.”

“As dice become peripheral-pad-limited, companies other than IBM will be inclined towards the adoptions of area array pads and flip chip assembly processes to support single and multi chip packages.”

“What is needed is cost-effective evolution of current technologies… Execution rather than creation will be the guiding principle to the year 2000.”

“… two principles will be required to survive:

• to be successful, vendors must understand the specific constraints of each customer and understand what is of value. There will be a different answer with each customer.
• The corollary is to be careful when projecting one customer’s reasons for adopting a technology on another’s”

“To understand what is important and worth paying for, is also to understand what is not important and not worth paying for.”

For the entire article, and many others, visit www.beTheSignal.com, and check out the Signal Integrity Library.

In the last few years, the focus of Bogatin Enterprises has been almost exclusively signal integrity education. This is through our live classes, lectures and publications.

Our mission is to accelerate engineers up the learning curve to enable them to “get to the right answer faster.” We do this through three general themes in all of our activities: understanding the principles, applying analysis techniques to explore design space with “virtual prototypes” and leveraging commercial measurement and simulation tools.

Combined, we find this is an efficient process to transform complexity into practical design solutions.

Other than a little kibitzing over the phone or after classes, we do not do consulting. While we are never at a loss when asked our opinion, sometimes problems require more than a superficial analysis. This is when we recommend other experts in the industry whose mission is providing expert advice and services to help you solve your problem or achieve your design goal.

For anyone looking for consulting assistance, I’ve created a new page on my blog with a list of recommend consultants. If you need help in your current project, you’ll want to contact the experts I list here.

“There is no such thing as a free launch”, Scott McMorrow, President of Teraspeed Consulting Group LLC is fond of saying. It is offered more for effect than truth, considering that one of his specialties is engineering transparent launches.

Teraspeed Consulting was founded in 2002 to “Enable clients in the design and implementation of extreme performance systems.” Their staff has more than 120 years of collective design experience in measuring, analyzing and designing high speed systems.

The techniques they pioneered span from DC to 50 GHz, covering 3D electromagnetic simulation to VNA and TDR de-embedding and calibration techniques measurements. Just as important are the tricks and methods needed to get good correlation between simulation and measurement.

Scott has found that a key ingredient to successful simulation-to-measurement correlation is accurate materials characterization, so this has become an important element in the engineering services Teraspeed offers.

They specialize in the following services, each spanning the DC to 50 GHz range::

• Correlation between electromagnetic solver and measurements
• Interconnect model correlation
• Material property measurement and modeling
• RF test launch design

GigaCon connector system engineered by Teraspeed for transparent launch and the measured 50 Gbps eye for this system.

If your project involves data rates above 10 Gbps, you will not be successful by accident. Cost effective systems require that you do everything right. If you are looking for help navigating the complex trail through the maze of Gigabit design, I recommend Teraspeed as a guide.

This question comes up in almost every advanced class I teach: what are the limits to FR4?

Like almost every important question in signal integrity, the answer always stars with “…it depends.”

The next step is to “put in the numbers” using analysis tools, based on all the assumptions and conditions for the specifics that should be considered.

In a long differential channel, if we do everything right, like no stubs anywhere, no asymmetry anywhere, no cross talk and no impedance discontinuities anywhere, the limitation for the highest data rate a channel can support is set by the signal to noise ratio (SNR) at the receiver.

While there are theoretical evaluations based on Shannon’s Information Theory about a channel’s information carrying capacity, its – 3dB bandwidth and the SNR at the receiver, there is an alternative analysis based on practical considerations.

If everything is done right in the channel, the fundamental limit to the data rate it will support will be set by the frequency dependent attenuation and how much signal is required for an acceptable eye . It’s not just the attenuation, it’s the frequency dependent attenuation. If we have roughly a linearly decreasing attenuation with frequency, much of this can be compensated using equalization techniques such as CTLE (continuous time linear equalization), FFE (feed forward equalization) or DFE (decision feedback equalization).

Typical high performance specs offer a limit of about –25 dB attenuation at the Nyquist frequency as the practical limit to what can be recovered in a usable eye. However, my buddies who work with optimized TRX equalization techniques tell me that if all the more than 10,000 coefficients available for the three equalization techniques are optimized perfectly, it may be possible to recover a usable eye with –40 dB attenuation at the Nyquist frequency.

Now we can ask, how far and at what frequency can you go in an FR4 interconnect and still have less than –40 dB attenuation? This is a simple analysis, which we go through in our S-parameters for SI (SPSI) class and Advanced Gigabit-differential Channel Design (AGCD) class. The result is a simple relationship between the length of the interconnect, in inches and the highest data rate, in Gbps, below which the attenuation will be less than –40 dB and an acceptable eye can be recovered. This relationship is:

This assumes the attenuation is limited to just dielectric loss and no conductor loss, which is the ultimate best that can be done. There is a distance-bandwidth trade off. This is fundamental and is the driver for transitioning to fiber optic connections at either high data rates or long distances. The boundary of when photons are more cost effective than electrons is set by this relationship.

Generally, the closer you get to this fundamental limits, the more expensive it becomes to implement a solution in copper and the more cost effective the solution may be in optical interconnect.

For example, in a 40 inch backplane, the ultimate limit to copper is about 20 Gbps. It is probably not practical to achieve 28 Gbps in a 40 inch backplane using a pulse amplitude modulation of two levels (PAM2), with an FR4 type material even with wide copper traces. Data rates above 20 Gbps using copper interconnects will require a lower loss laminate.

This estimate is not so far off from what is actually measured. Here are examples of the measured insertion loss for different length transmission lines in FR4 interconnects using wide conductors.

For the 40 inch interconnect, the frequency at which the insertion loss is larger than – 40 dB is about 10 GHz. This suggests the possibility of sending data at about 20 Gbps through this interconnect, close to what we estimated.

What’s the limit to copper interconnects in backplane applications? It depends. As a rough starting place, doing everything right, FR4 interconnects will limit out at about 20 Gbps in 40 inch backplanes. For higher data rates, and to have better margins, lower loss laminates will be in your future. It may be a possible to implement 40 Gbps backplanes in copper using suitable low loss materials.

There will be a limit to copper where it becomes more cost effective to switch to optical interconnects. I remember the days when folks suggested this limit was 2.5 Gbps. Then practical solutions in copper were developed. Then the limit was touted as 5 Gbps. But this was overcome. Then I heard the limit was 10 Gbps, but cost effective solutions were found.

As the cost of higher data rate copper channels goes up and the cost of optical channels comes down, they will cross and optical interconnects for 40 inches will be cost effective. I think this day is still in the future. To paraphrase Mark Twain, “the reports of copper’s death are exaggerated.”