Eric Bogatin's Blog: What I Learned This Month

Getting started in signal integrity? check out the pdf copy of Chapter 1 from Signal and Power Integrity- Simplified, available for free download on www.beTheSignal.com.

If your last product passed FCC certification and shipped on time, pat yourself, your EMC engineer and your design team on the back. You accomplished something that is really hard and doesn’t usually happen by accident.

Of the various EMC certification tests, the FCC Part 15 Class B, which applies to consumer products, is one of the most stringent. In the roughly 100 MHz range, the maximum allowed radiated emissions from your fully functioning product, when measured 3 meters away, within a 120 kHz bandwidth, must be less than about 100 microVolts/m.

To put this in perspective, what do you think is the maximum power a radio station could transmit, into a 120 kHz bandwidth, and still pass this FCC test? Is it 1 watt? 1 mwatt? 1 microwatt?

The answer is shocking. A radio station would have to radiate less than 10 nanowatts of power into a 120 kHz bandwidth, in order to pass certification. This is hard.

The most common reason for products to fail this test is due to radiation from common currents on external cables. For a cable 1 meter long, it only takes a common current of 3 microAmps to radiate enough to fail a certification test.

When you consider that a 1 volt signal, driving into a 50 Ohm line, is a signal current of 20 mA, you see that the common currents must be less than 0.01% of the signal currents. This is why passing EMC tests is hard.

I have yet to encounter a single large system company that does not have a horror story to tell of a product that worked great, passed all the functional tests, but either was never able to pass FCC certification or took so long to fix an EMI problem that its release was late and it missed the market window.

You don’t pass an FCC test by accident. It is by designing radiated emissions out of the product right from the beginning, and where you can’t design them out, you add filters and shielding to minimize their impact on the certification test.

Don’t expect to learn how to design a product to pass an EMC certification test by following a list of ten habits. But, if you want a list of topics to use as a guide to begin the discussions in your design team, here are my recommendations for the Top 10 Habits to follow to increase the probability of passing an EMC certification test:

1. Ground bounce drives common currents on external cables. Minimize ground bounce in all the components of your system
2. Use shielded cables. The shield of the cable should be an extension of the enclosure, not connected to the ground planes of circuit boards. Cable connectors should make a 360 connection between the shield and the enclosure.
3. All control wires and cables that leave the board, even if they are just routed inside the enclosure, should be routed with an adjacent return conductor. Use as long a rise time as you can afford for all signals that leave the board. Increase rise times with filters.
4. Use ferrites around the outside of external cables to suppress common currents.
5. Minimize mode conversion in all differential channels that leave the enclosure.
6. Add common signal chokes to all differential signals that leave the enclosure.
7. The largest source of noise, above 50 MHz, that gets into the power and ground network is from signals passing through the power and ground cavity. Manage this noise with return vias, differential signaling and decoupling capacitors adjacent to signal vias. Smart stack design up can enable the use of return vias.
8. Design the stack up so you can have power and ground planes on adjacent layers, with as thin a dielectric as possible, and preferably close to the board surfaces.
9. Plan on using a spread spectrum clock generator to smear the first harmonic of all signals into a wider bandwidth. The FCC receiver has a 120 kHz bandwidth. If you can spread the spectrum of each harmonic over 1.2 MHz, you reduce the average power detected in the FCC test by 10 dB.
10. Enclosure design is not about designing enclosures, it is about designing apertures and seams.

Bring these topics up in your next design review. Have your SI engineers and EMC engineers explain what they mean. If you are still not clear on the concepts, or how to implement them, read a book, find an expert or take a class.

If you weren’t aware of these guidelines when you designed and built your last product, you may have been lucky and dodged a bullet. Don’t rely on luck for your next design.

Getting started in signal integrity? check out the pdf copy of Chapter 1 from Signal and Power Integrity- Simplified, available for free download on www.beTheSignal.com

Today, signal integrity has become the limiting factor in all products operating at 200 MHz and above. This includes all communications products, servers, personal computer and even cell phones. Not paying attention to signal integrity in the beginning of a design means the product may not work at bring-up.

While the highest end applications- telecommunications, test and measurement, super computers, mainframes and servers have been in this regime for more than thirty years, mainstream consumer products have been sensitive to signal integrity effects for only about ten years.

At the dawn of the “mainstream signal integrity” era, before “social networking” was even imagined, there was the SI-List. Almost all signal integrity engineers, at one time in their career, have participated on this email distribution list, either posting questions, answering questions, participating in the debates or listening to the chatter.

Sixteen years ago, on May 16, 1994, the SI-List was born with 30 members on the charter email list.

Ray Anderson, then a recent convert to signal integrity from years as a microwave engineer, came up with the idea of an email discussion group to continue the question and answer period from the last day of a four day short course he had taken on signal integrity.

He had recently joined Sun Microsystems as a signal integrity engineer. His jump start into this new field was “Electrical Modeling, Simulation and Design of Electronic Packages”, taught by Raj Mittra, Paul Franzon and Jose Schutt-Aine in San Jose, CA on May 9-12, 1994.

“On the last day of class I said it would be really neat if we put together a mail list to pose questions and answers to continue the discussions. I went back to my office on Monday and hacked together an email list on the SPARC2 worskstation sitting in my office at Sun Microsystems with the thirty names from the class.”

Figure 1. Ray Anderson in his package characterization lab at Xilinx, where he is currently a senior engineer.

Sixteen years later, there are 4,000 members on the SI-list spread over more than 34 countries. The range of participants starts with novices and students in college and extends to world renown experts such as Scott McMorrow, Steve Weir, Istvan Novak and Todd Hubbing.

“The typical questions posed to the list today, are not that different from the early days,” Ray says. “Over the 18 years I’ve been in signal integrity, the technology has changed, but the physics hasn’t.”

The questions posed on the SI-list are an indication of the most confusing or controversial topics in signal integrity. Power distribution design (PDN) has always been a hot topic. How many and what value decoupling capacitors do I need on my board and where should they be placed are the most common questions asked, followed by what is the inductance of a via?

Questions range from general, open ended topics, such as which is better a VNA or TDR? to specific design questions about the timing delay between data and clock in the DDR3 JEDEC timing spec.

The hot topic these days include the frequency dependence of the dielectric properties of laminates and the use of S-parameters to describe interconnect performance including causality and passivity.

“When I started the list and saw it grow so fast, I had visions of herding cats. But, it has turned out to be remarkably well self managed. Peer pressure usually establishes the norms for behavior,” Ray says.

In addition to questions and technical discussion, it is also a bulletin board for announcements about upcoming webinar, seminars, short courses or job announcements. List etiquette discourages recruiters from posting job openings in the SI field, except by the hiring manager directly.

There are always those who abuse the list. However, over the 16 years of its existence, there have only been 12 individuals banned from the list. One of the biggest frustrations with long time participants of the list is with the same, fundamental questions being asked by “newbies.”

“If you are going to ask a question,” Ray advises, “do your homework first. Make an attempt to solve the problem yourself. Read some books, search the web and the list archives, then pose the questions. Don’t just try to get someone to do your work for you.”

To subscribe to the SI-List, go to : http://www.freelists.org/webpage/si-list

To view the archives of postings, go to: http://www.freelists.org/archive/si-list/

Next No Myths Allowed Webinar: Frequency Dependent Material Properties, so what?, Thurs, Feb 25, 2010, 1 pm EST. Free, but you must pre-register here.

Spring Institute of Signal Integrity Classes, April thru May 2010, San Jose, more info and online registration here.

One of my fun activities at DesignCon is getting to conduct 10-minute interviews with signal integrity stars. These are filmed by RealTime with DesignCon and posted on their website.

I did about 10 different interviews and other reporters with RealTime did another 20 or so interviews. If you missed DesignCon, or just want to see some of the new products, materials, tools and design solutions you might have missed, you’ll want to check out the posted interviews.

In particular, here are some of my favorites you’ll want to be sure to view:
Colin Warwick, Agilent, talking about their new 3D display. In addition to looking like a couple of really cool SI Dudes, we were able to see the results from a full wave EM field solver of current flow in a via field. With the LCD shutter glasses, and interleaved left-right screen being displayed on the monitor, it really did look like the vias were standing out in front of the screen. This 3D capability is embedded in Momentum and EMPro., able to show currents, fields and voltages.

 Joel Peiffer, 3M, talking about C-ply. 3M can provide thinner than 25 micron thick C-Ply laminates, sandwiched between copper planes. The dielectric is ground up Barium Titanate filled epoxy offering a Dk of 16-20. This is great for power and ground planes. The breakdown strength of the I mil core is more than 100 v. While Joel said these materials are in production and he has customers shipping their product with C-Ply, I could not get him to reveal any customer names. He just hinted that the early adopters are cell phone manufactures, and 10-15% of all cell phones are shipped with C-Ply.

Don DeGroot, CCN-I, talking about pcb materials measurements in his company. Don came from NIST, where he worked for 12 years as a researcher in the rf test group. He’s spun his experience in precision measurements into a company that performs contract materials measurements. He talked about the transitioning of NIST engineering techniques into a commercial business and how he does practical materials characterization.

Todd Westerhoff, SiSoft, talking about what’s new from SiSoft. At DesignCon 2010, SiSoft engineers gave 3 papers. One was on “When Shorter isn’t Better.” Todd described some problems where reflections in short tracks can cause problems, especially with resonances at specific lengths. If the traces are long enough some of these resonances may damp out and not be a problem. The danger, he says, in applying design rules is you may miss these length specific problems. This is why he advocates doing a post layout analysis.

To catch all of the RealTime interviews, check out their web site.

DesignCon 2010 is right around the corner. It will be a busy time for all. As you set your schedule for the fours days of the show, be sure to add these events to your list:

Visit beTheSignal.com at booth #319. You’ll want to pick up a mug, an Appendix A -pocket guide to signal integrity design guidelines and, of course, some chocolate! Stop by and meet Susan and Laura. And I may have copies of my science fiction book, Shadow Engineer, on sale.

Monday, Feb 1, in the Theatre, I will present a 3 hour education forum, “Practical Magic: Signal Integrity Problems Disappear with the Right Tools“. My Agilent buddies and I will be showing about a dozen demos of some really cool hardware and software tools that I think should be in every signal integrity engineer’s tool box. check out my youtube video!

Tues, 8:30 am, I will present a paper “Frequency Dependent Material Properties: So What?”, with Don DeGroot, Sanjeev Gupta and Colin Warwick. If you are wondering about all the hype associated with “causal material properties” and want to know how does this apply to me, you’ll want to check out this talk.

Tues, 9:20, my colleague, Paul Huray, will present, “Impact of Copper Surface Texture on Loss, a Model that Works.” There’s a lot of buzz these days about rms roughness of copper. Come hear Prof Huray explain it’s really the surface texture of the copper, not just the rms roughness, that affects the extra losses from rough copper. You may find, as I discovered, that “everything you know about current and signal propagation is wrong.” Come hear the right way of thinking about how signals really propagate on interconnects.

Tues, 3:45 pm, I will participate on a panel discussion, “Science Fiction…is it really fiction?” This has got to be one of the more fun events at DesignCon, at least for me. I get to share the panelist table with Gentry Lee, famed co-author with Aurthur C. Clark of the Rama series, among other books, and noted scientist at JPL. We will talk a little about our visions of the future and open up the floor to discussion. Rumor has it, some of us might have books available for a book signing!

Wed 8:30 am. If you missed my education forum on Monday afternoon, you can catch it again on Wed morning.

I’m exhausted already, just writing about the exciting happenings at DesignCon 2010. See you there!

Next No Myths Allowed Webinar, “Selecting Capacitor Values for the PDN”, Dec 9  2009, 1 pm EDT. Signup now.

In preparing for a paper at DesignCon 2010, I’ve been reviewing books and papers related to frequency dependent material properties and their effect on signal quality, especially at high data rates.

I’ve come across two excellent books that cover this topic, as well as many other advanced SI topics, better than any others I’ve encountered. They are Advanced Signal Integrity for High-Speed Digital Designs by Stephen Hall and Howard Heck and The Foundations of Signal Integrity by Paul Huray.

If you want to understand what characteristic impedance is, or why SSN is created by gaps in the return path of a signal, read my book, Signal and Power Integrity Simplified. But, if you want to trace the origins of signal integrity effects back to Maxwell’s Equations, read these books.

Advanced Signal Integrity for High-Speed Digital Designs by Stephen Hall and Howard Heck, is a bit of a sequel to Stephan Hall’s previous book, High-Speed Digital System Design. If you have this book, it is well worth upgrading to version 2.0.

Hall and Heck cover the traditional SI topics of E&M fields in transmission lines, reflections, cross talk and differential signaling. There is no coverage of PDN issues, but the sections on resistive loss, dielectric loss and equalization techniques easily make up for this.

In all of my searching, I found no better explanation of the Kramers-Kronig relation and how it drives the causal relationship between the resistance and inductance per length of a transmission line, or causal material properties. They describe the impact from RMS roughness on series resistance, even introducing the Huray model for copper surface texture.

The most useful section for me was on the models for the real and imaginary parts of the complex dielectric constant and the origins of the single, multiple and infinite pole Debye models. While this topic has been covered many other places, this chapter takes you from start to finish, giving you the tools to immediately apply this model to board design.

If you want to go the next step beyond Hall and Heck and re-calibrate your intuition about how to apply Maxwell’s Equations to Signal Integrity, you need to get Paul Huray’s new book, The Foundations of Signal Integrity.

In the interests of full disclosure, I freely admit that I have recently had the distinct honor and privilege of working with Prof Paul Huray on a project with a few Intel Engineers and have been able to “learn directly from the master.”

While another mentor of mine, Yuriy Schlepnev, the president of Simberian Software and architect of the 3D full wave simulator, Simbeor, has tried to teach me the right way to apply Maxwell’s Equations to signal integrity, I never spent enough time with him for his teachings to sink in.

From Prof Huray, I have finally learned what Yuriy has been trying to tell me:  “everything I know about the world is wrong.” It’s the fields that do everything and currents don’t really travel down a signal path. Carrying this concept of currents around, while a useful crutch, screws up our intuition about how RMS roughness really affects the series resistance of a transmission line.

Using his expertise in Maxwell’s Equations, Prof Huray has developed an analytical model for how signals are affected by the surface texture of copper which matches actual behavior well above 30 GHz. You will hear more about his approach at DesignCon 2010.

Prof Huray has condensed his years of teaching graduate level EM classes and his research programs which apply EM first principles to signal integrity problems into his latest book. This is not for the faint of heart. But, if you want to learn the right way of thinking about Maxwell’s Equations this is the book for you.

Since it’s the fields that really do all the work, he has color coded all reference to E fields in red and all reference to H fields in blue. The dramatic illustrations of the relationships between propagating E and H fields in waveguides, at boundaries and in various materials are tremendously valuable and also follow the color codes. This makes it much easier to follow the path from Maxwell’s Equations to their application in signal propagation.

Almost half of the book covers the very important topic of the role of material properties on signal propagation. As might be expected, he introduces the Huray model for copper surface texture and how this model can be extended to more irregular copper textures.

The serious engineer can find no better pair of books than these. Through their guidance you will be able to trace your way back to how, with Maxwell’s Equations and the right boundary conditions and material properties, all of signal integrity naturally flows. Their value will only increase with time as digital electronics encroaches more and more into the microwave world.

For information on this and other multi gigabit topics, check out our new class, Multi Giga Bit Design (MGBD).

Next No Myths Allowed Webinar, “Selecting Capacitor Values for the PDN”, Dec 9  2009, 1 pm EDT. Signup now.

“There ain’t no such thing as a free lunch,” is how the phase, popularized in Robert Heinlein’s book, The Moon as a Harsh Mistress, usually goes.

But that’s not how Scott McMorrow, director of engineering at Teraspeed, uses the phrase. He is fond of saying “There ain’t no such thing as a free launch.”

It’s sort of ironic, because he and his team are world experts at providing nearly free launches.

A launch is a transition from one transmission line geometry to another. While a coax cable and a stripline in a circuit board may each be electrically transparent, when one transitions into the other, the interface, or launch, will always show up as a discontinuity.

This discontinuity will cause a reflected signal and a reduction in the transmitted signal, which shows up in the insertion loss. The larger the discontinuity, the bigger the impact on the insertion loss. And, due to the physical size of a launch, it is always more of a problem at higher frequencies.

To minimize the launch discontinuity, Teraspeed recommends using a surface mount SMA connector and carefully optimizing the features of the launch via pad stack.

The figure to the left shows the TDR response of a conventional, well designed launch and a Teraspeed “free launch”, with a roughly 35 psec rise time signal and 5 Ohms per division. This was reported, most recently, at DesignCon 2009 and can be found in the reprinted article on the Simberian web site.

The pad stack includes the capture pads, the via barrel diameter, location of return vias, and clearance holes in any planes. Of course, what works in one board will be not always be the best design in another board due to the precise combination of signal layer and plane layer assignments and dielectric thicknesses.

Translating a specific board’s pad stack into the virtual world of a 3D field solver enables you to quickly optimize the clearance holes for a transparent launch. For example, if the launch impedance is high, make the clearance holes smaller. If the impedance is low, make the clearance holes larger.

This principle of a “free launch” applies to all transitions, especially important from the planar geometry of a circuit board to the 3D geometry of a connector.

Samtec made popular the term, “the final inch” to describe the break out region (BOR) of a circuit board connector’s via field. Using this principle of optimizing a few features in the immediate region of the launch, they can make the circuit board transitions into their connectors nearly transparent.

When done well, the transition from any connector to board traces can be transparent. This is important when designing test vehicles, ATE load boards and high performance product boards. As PCIe and USB enter the 5 Gbps and above regime, designing transparent launches will be an important skill.

For information on this and other multi gigabit topics, check out our new class, Multi Giga Bit Design (MGBD).

Hope to see you in cyber space at our next webinar!

Next public classes: Essential Principles of Signal Integrity and Advanced Signal Integrity Design, and Multi GigaBit Design, Sept 29- Oct 7 in San Jose, CA.

Next No Myths Allowed Webinar, “Selecting Capacitor Values for the PDN”, presented on Dec  9, 1 pm EDT.

I just learned from Colin Warwick, my buddy at Agilent, of a series of workshops Agilent is presenting on Fast Channel Simulation and Statistical Eye Diagrams.

If you do channel simulation and need to check very low bit error rates or need an accurate measure of the jitter distribution, you may have to simulate millions of bits. If you are also using the eye diagram simulation to explore design options, you may have 10 to 50 different designs to evaluate.  If you’re not doing it smart, you’re simulation is probably still running.

Agilent recently introduced some clever techniques based on the transient response of the channel and statistical analysis to synthesize eye diagrams for LTI (linear time invariant) systems which can show BERs well below 10^-12 in a few minutes of simulation time.

This process could revolutionize the way you explore new design options. To learn more about it, check out the workshop, coming to a city near you.

Next public classes: Essential Principles of Signal Integrity and Advanced Signal Integrity Design, and Multi GigaBit Design, Sept 29- Oct 7 in San Jose, CA.

Next No Myths Allowed Webinar, “Stack-up Design for Differential Pairs”, presented free on Sept  16, 1 pm EDT.

I was not able to attend the 2009 IEEE EMC Symposium held in Austin last week, but as a member of the EMC Society, I got a copy of the proceedings.  I was delighted to find a number of really exciting papers. Some introduced new ways of modeling or evaluating interconnect structures like vias and the power-ground cavity, while others recounted simple experiments to verify or quantify well know solutions.

Over the next few months, I will try to review some of the more relevant paper to give them a little more visibility.

Two papers in particular showed very simply the problem with connectors in cable assemblies. In the ASID class, I spend a whole module on EMI problems and solutions. While external cables, even shielded coax cables, may act as the radiating antenna, its not the cable that is the source of the noise voltage that drives the common currents that radiate; it’s the connector.

In the paper, “Relationship Between Connector Contact Points and Common-mode Current on a Coaxial Transmission Line,” by Hayahi, Mizuki and Sone, of the Tohoko University in Sendai, Japan, the authors illustrate this principle with a simple construction.

They built a two-section coax cable, with the sections connected in a region where they could vary the number of connecting wires between the shields. Four configurations were constructed, with 1, 2, 3 and 4 connecting wires between the shields.

What I teach in the ASID class is that the more the connector allows the return current to flow symmetrically around the signal current, the more cancellation of external magnetic field lines and the lower the total inductance of the return path. In these four different return path configurations, the more the connection looked like a 360 degree, symmetric path, the lower the common currents around the cable and the lower the emissions.

Though this was not a profound conclusion, nor unexpected, it was a simple, beautiful example of this principle that the connector is often the weak link in radiated emissions from coax cables.

In the paper, “Effectiveness of Shield Termination Techniques Tested with a TEM Cell and Bulk Current Injection,” by Bradley and Hare of NASA Langley Research Center in Hampton, VA, the authors show by direct measurement the radiated emissions from cable assemblies with different shield termination schemes.

When a pigtail or drain wire is used to provide the return path connection, the radiated emissions are 20 dB higher than with a connection that goes 360 degrees around the signal current. In fact, the authors compare four different ways of making the 360 degree termination, using foil, clamping the braid, soldering the braid and an elaborate clamp to the backshell with additional braid overlapping the cable shield.

They find that all the methods that provide 360 degree connection work equally as well.

These two papers did not rock the world, but they demonstrate in simple, clear experiments this principle that when the return currents are not symmetrical around the signal path, the noise across the total inductance of the return path will drive common currents which will radiate.

If you want to learn more about solving EMI problems by understanding the root cause of the problem and the essential principles on which the solutions are based, check out the classes and lectures listed on our web site.