What I Learned this Month

“At 25 Gbps, everything makes a difference,” Dave Dunham told the crowd gathered for the 2nd Front Range Signal Integrity Seminar Series held in Longmont, CO on May 9, 2013.

Dave, the Director of Signal Integrity Engineering at Molex, outline the process Molex uses in designing connectors for ultra high speed, where simultaneous mechanical and electrical requirements push the envelop of what is practical.

He outlined a five step process and walked through a few examples.

The first step is establish a few simple figures of merit or rules of thumb. For example, usually the design goal is at the Nyquist frequency of the application data rate. The specs for return loss are typically less than –12 dB and for near end cross talk, less than –40 dB.

The second step is generating concept mechanical and electrical models. These are the basis for stress-strain curves and initial electrical performance.

The third step is feedback from all the team- mold engineering, stamping, assembly tooling, plating and marketing. This cycle of concept design- multi-disciplinary review feedback and re-design, continues a few cycles until a near final design converges.

In the fourth step, the final design is released. This is the best approximation to what will deliver the performance, reliability and manufacturability requirements. When it costs more than $100k for a mold to test out a design, simulation analysis tools are leveraged to explore virtual prototypes, rather than using the build it and test it approach.

This means it’s important to have confidence in the analysis tools that they will accurately predict the measured performance of a part once built. A design of experiments (DOE) study of the virtual prototype is a key element. This identifies the most important design variables and where attention needs to be focused for robust manufacturing.

The fifth and final step is verifying the design and creating the deliverables. For many customers, the board design is just as important in determining the connector performance as the connector itself. Dave’s team provides engineering support to help customer optimize the board design based on the specific details of the connectors.

If you would like to hear the details of how Dave implements this process for the highest performing connectors in the Molex portfolio, you can watch the complete recording and download a copy of his slides on the www.beTheSignal.com web site.

While  you are there, you can also watch the recording of Jeff Loyer’s presentation from March 7, 2013.

If you are in Longmont, join us for the live Front Range Signal Integrity Seminar Series. All these events are always free. I hope to see you there!

It’s easy to measure S-parameters. It’s challenging to measure them without introducing artifacts and interpret the measurements correctly.

Our newest class, Hands on Workshop for S-Parameter Measurements (HOW-SPM), was created to teach these valuable measurement and analysis skills. We just finished our first class and it was a wonderful success.

This class was limited to only 12 students and filled up in the first 2 weeks after it was posted. Our next class on March 1, will also fill quickly.

Pairs of students shared a SPARQ, Signal Integrity Network Analyzer from Teledyne LeCroy, operating up to 40 GHz. All the principles and techniques we taught applied to ANY VNA. We limited attendance to 12 students total, so that everyone would get stick time and individual attention from our expert instructors. During the course of the day, everyone measured a variety of samples, each illustrating different measurement and analysis principles.

Resistors were used to illustrate how the measurement from a DMM at DC translated into the same resistance as obtained with a 40 GHz VNA- in the frequency and time domains.

A range of quality level 50-Ohm cables were measured to show the wide difference in bandwidth of good and bad cables, and the role of the connectors. We used port re-normalization to change the port impedances to view 75 Ohm cables and de-embedded the launches to show the impact at low frequency from the the port impedance, and the influence at high frequency from the connectors.

Don DeGroot of CNN Labs, designed and built a really cool test vehicle for the class. This board will be available for sale by CCN Labs in early 2013.

We looked at non-uniform and uniform lines with good and bad launches, in microstrip and stripline, as single ended and as differential. It was obvious looking at the first few measurements how strong a role the launches played above about 2 GHz. By de-embedding them low return loss measurements could be obtained up to 15 GHz, the limit to the $4 SMAs we used on the board.

One of the special exercises we did was to export the measurements from the test board as touchstone files and bring them into an analysis tool to extract the Dk and Df over frequency. All students saw that the Dk was strongly affected by the launches above about 2 GHz. This is one example where de-embedding is so important and why we focused an entire module just on how to perform fast and accurate de-embedding, and equally important, how to verify the quality of the de-embed file.

If you want to improve your VNA measurements, you really need to check out this class. Our next one is on March 1, in Longmont, CO. It will fill quickly so you’ll want to sign up early. Hope to see you there!

There are two clear trends in all high speed interfaces, such as PCIe, SAS, Infiniband and even DDR memory: data rates are currently in the gigabit regime and there is a roadmap that requires the current data rates to operate at even higher data rates in the next generation.

As we all know, as data rate increases, signal integrity effects get worse and luck goes down.

If you want to get some insight into the design strategies and tactics to manage the transition to the next higher data rate, you’ll want to watch this webinar I moderated in late Aug, 2012. This topic is one of the themes in our new class: Advanced Gigabit Channel Design (AGCD). For more information, check out our web site.

In my role as contributing editor for EDN, in this webinar, I moderated a panel of three industry experts: Jim Nadolny of Samtec, Brad Griffin of Cadence and Allen Tung of NXP. I posed them three questions about the problems, strategies and tactics of higher data rate system design and we discussed the answers.

There were a number of key points that came out. Here is a brief teaser.

Brad Griffin: for shorter time to the correct design, it’s critical to integrate analysis as part of the layout and design flow. This includes not just reflections, cross talk and losses, but also “power aware” analysis.

Allen Tung: USB 3.0 operating at 5 Gbps will see significant eye closure due to the losses in the boards and cables in typical applications. One way of opening eyes and minimizing the impact from the interconnects is adding a re-driver or repeater chip in the signal path, typically placed at the edge of the board. This does not require any changes to the rest of the circuit.

Jim Nadolny: As a good rule of thumb, the eye will probably be sufficiently open with no equalization if the insertion loss at the Nyquist is no more than –7 dB. There should be about 20 dB SNR so the acceptable cross talk should be less than about –25 to –30 dB in this case. Using pre-emphasis only, you can recover an acceptable eye with about –12 dB insertion loss at the Nyquist. And with FIR, CTLE and DFE, you can recover an acceptable eye with about –25 dB insertion loss at the Nyquist.

You can read a longer review of this webinar by Richard Goering, posted here. And, you can view the entire webinar, recorded and posted here.

If you have suggestions for future webinars, drop me a line!

Do you care about reducing EMC or signal integrity problems in your next design? Do you struggle with the confusing and conflicting design guidelines offered in application notes, or in articles in the trade press? Want to take a class, but not sure if you want to spend all of your time listening to just one expert? Then here is the opportunity for you!

For three days during the 2012 IEEE EMC Conference in Pittsburg, PA, in Aug, you can participate in the the Global EMC and SI University. This will be the sixth year for this concentrated study program, which consists of 17, different 1-2 hour tutorials focused on important and practical topics in EMC and SI system design.

Learn about “Differential Pair Design I wish my Mother Taught Me”, from Jeff Loyer, or “Why Eyes Collapse”, by Patrick Carrier, or “Horror Stories from the Field- with Happy Endings”, from Rick Hartley. These are just a few of the talks you will be able to catch at the Global EMC and SI University.

Tutorial sessions will be held from Tues, Aug 7 to Thurs, Aug 9, concurrent with the IEEE EMC symposium. There will be breaks for attendees to visit some of the conference technical sessions and the show floor. But, you must register separately for the Global University to attend these outstanding tutorials.

When you register for the IEEE EMC conf, there is an option to click to add the registration for the Global U. Some of the tutorial sessions are presented only in the EMC or only in the SI tracks while others are joint presentations.

This year, I am honored to be the coordinator for the SI tutorials, sharing the responsibility with my colleague Mark Staffka, who is coordinating the EMC tutorials. Chuck Bunting is the overall Chair of the Global University. We’ve pulled together a collection of 17 experts in the industry to present on a wide range of topics such as  S-parameters, practical tools for EMC and SI analysis and PDN design. For the full schedule, click here.

This year, the Global University was expanded to include signal integrity. This reflects the increasingly important role of signal integrity topics in the IEEE EMC society.

Nowhere will you find such a distinguished collection of world class experts offering tutorials on practical EMC and SI topics. When a unique opportunity like this comes along, you should seriously consider taking advantage.

I’ll see you there!

In the last few years, the focus of Bogatin Enterprises has been almost exclusively signal integrity education. This is through our live classes, lectures and publications.

Our mission is to accelerate engineers up the learning curve to enable them to “get to the right answer faster.” We do this through three general themes in all of our activities: understanding the principles, applying analysis techniques to explore design space with “virtual prototypes” and leveraging commercial measurement and simulation tools.

Combined, we find this is an efficient process to transform complexity into practical design solutions.

Other than a little kibitzing over the phone or after classes, we do not do consulting. While we are never at a loss when asked our opinion, sometimes problems require more than a superficial analysis. This is when we recommend other experts in the industry whose mission is providing expert advice and services to help you solve your problem or achieve your design goal.

For anyone looking for consulting assistance, I’ve created a new page on my blog with a list of recommend consultants. If you need help in your current project, you’ll want to contact the experts I list here.

“There is no such thing as a free launch”, Scott McMorrow, President of Teraspeed Consulting Group LLC is fond of saying. It is offered more for effect than truth, considering that one of his specialties is engineering transparent launches.

Teraspeed Consulting was founded in 2002 to “Enable clients in the design and implementation of extreme performance systems.” Their staff has more than 120 years of collective design experience in measuring, analyzing and designing high speed systems.

The techniques they pioneered span from DC to 50 GHz, covering 3D electromagnetic simulation to VNA and TDR de-embedding and calibration techniques measurements. Just as important are the tricks and methods needed to get good correlation between simulation and measurement.

Scott has found that a key ingredient to successful simulation-to-measurement correlation is accurate materials characterization, so this has become an important element in the engineering services Teraspeed offers.

They specialize in the following services, each spanning the DC to 50 GHz range::

• Correlation between electromagnetic solver and measurements
• Interconnect model correlation
• Material property measurement and modeling
• RF test launch design

GigaCon connector system engineered by Teraspeed for transparent launch and the measured 50 Gbps eye for this system.

If your project involves data rates above 10 Gbps, you will not be successful by accident. Cost effective systems require that you do everything right. If you are looking for help navigating the complex trail through the maze of Gigabit design, I recommend Teraspeed as a guide.

Even though we’ve provided signal integrity training classes for more than 20 years, we are constantly evolving them based on the changing needs of the industry and feedback from our customers, our students.

Our most successful experiment has been the introduction of hands on labs to all of our classes. These are based on three different tools which we’ve arranged to give to all of our students.

QUCS is the easiest to use SPICE-like circuit simulator I’ve ever found. We provide the software and all the lab exercises using this tool.

Mentor’s HyperLynx is the most popular advanced circuit simulator with integrated field solver. Recently Mentor has announced cloud access to HyperLynx. Through special arrangement, we give our students access to their cloud server and the special labs we’ve created that run on this server.

LeCroy’s SI Studio is a powerful signal analyzer which has an S-parameter viewer, a signal synthesizer, a channel simulator and clock recovery algorithms which can implement FFE, DFE and CTLE algorithms. Additional analysis tools can be applied to extract useful parameters from the eye, such as jitter decomposition.

By special arrangement with Mom and Dad at LeCroy, we give a fully licensed version of SI Studio to all students who attend our classes. This software tool has a $5,000 list price.

Starting in 2012, all students to any of our classes will receive:

• A color copy of each slide in the handouts
• An e-book copy of Signal and Power Integrity Simplified viewable on ANY device
• A copy of the QUCS software and the QUCS hands on labs
• Access to the Mentor Graphics cloud server and the HyperLynx hands on labs
• A licensed copy of the LeCroy SI Studio software and the SI Studio hands on labs
• Breakfast, snacks and lunch
• A certificate of completion

Check out the schedule of classes and all the course details on our web site.

Now, more than ever, time is a valuable commodity. Product design is just as much about meeting performance targets and cost targets as schedule targets. This means getting to an acceptable answer quickly is critically important.

This is the focus of the signal integrity classes offered by Bogatin Enterprises. We present not just specific design guidelines but also a design methodology based on identifying the potential signal integrity problems that will come up in all high speed designs, and implementing features which prevent these problems.

The details of our design philosophy and how our training will help you get to the right answer faster, are presented in a new brochure, available for download here. A list of the specific advanced signal integrity classes are also included.

New in 2012, we introduce hands on labs for all the classes, leveraging Mentor Graphics HyperLynx. By special arrangement, we give all registered students access to a cloud server running our specific labs in HyperLynx. These have been specially designed to illustrate and reinforce the design principles introduced in each class.

Also new in 2012, our most popular class, Essential Principles of Signal Integrity (EPSI) has been turned into a 1-day class and offered at a greatly reduced price so that more engineers can get a jump start on eliminating their SI problems.

All of our other classes are advanced, 2-day classes, with specific hands on labs.

All registered students receive, in addition to a copy of the handouts, a pdf copy of all class notes, an e-book version of Signal and Power Integrity- Simplified, a copy of the hands on labs using QUCS and access to the Mentor Cloud server running the HyperLynx hands on labs. Finally, students also receive a licensed copy of LeCroy’s SI Studio.

It is often said, “There are two kinds of engineers, those who have signal integrity problems and those who will.”

With the skills you gain from Bogatin Enterprises classes, you will become a “Signal Integrity Ninjaneer” and beat all of your SI problems into submission.

Last July, Bogatin Enterprises was acquired by LeCroy Corp and today, I had the honor and thrill of meeting Walter LeCroy, the founder of what has now become the supplier for the world’s highest bandwidth, real time scopes.

In 1964, Walter started up LeCroy Research Systems (LRS) to provide innovative instrumentation. Fifty years later, we are a global company with some of the industry’s top experts, pushing the envelope of practical measurement solutions.

If you have a chance during DesignCon 2012, you should stop by the LeCroy booth, #101 and say hi to the founder of one of the top scope suppliers in the world.

Walter will be around on Tues Jan 31 and Wed Feb 1. See you there!

I’ve assembled a few of the signal integrity experts I turn to when I have a technical question to join me in an “Ask the Experts” panel at DesignCon 2012.

On Wed Feb 1 at 2:00-2:45 pm in the ChipHead Theater, I will moderate a panel discussion, “Ask the experts, anything goes”. Included on the panel of experts are:

• Scott McMorrow, Teraspeed
• Bruce Archambeault, IBM
• Jim Nadolny, Samtec
• Yuriy Shlepnev, Simberian
• Ravi Kollipara, Rambus
• Jianmin Zhang, Cisco
• Jason Miller, Oracle

I have the best job in the world. I get to solicit questions from the audience and pose them to the panel. As an experiment, I will also accept questions by twitter.

On twitter, send your questions to @beTheSignal and use #SIDoctorIsIn.

If you heard a design guideline that just didn’t sound right, if you just released a design to fab and are staying up at night worrying about an iffy design feature, if you need the correct answer to settle an argument with your design team, come to this once in a lifetime opportunity to ask the world’s top signal integrity experts, personally.

You are guaranteed to learn something new and important from this exciting panel discussion.

• Should decoupling capacitors go on top of the board, or on the bottom of the board?
• Should DC blocking caps go near the TX or the RX?
• Should meander lines have a few long loops or many short loops?
• Which is better, tight or loose coupled differential pairs?
• Does a microstrip transmission line really cause EMC failures?
• What are the three most commons sources of failure in DDR3 designs?
• Where does the return current in a common signal go when it transitions from a circuit board to an unshielded twisted pair cable

Of course, the answer is always, “…it depends”, but learn from the experts, on what it depends.

See you there!