Published by Eric Bogatin on 29 Apr 2009
4/29/09 Practical Analysis of Backplane Vias
At DesignCon 2009, the paper I co-authored with Bert Simonovich, Mike Resso and Sanjeev Gupta, won a best paper award. It was titled “Practical Analysis of Backplane Vias.”
You can download a copy of the paper, which is BTS107, from our web site. I also expanded on this topic in the April 2009 issue of Signal Integrity Insights, available on our web site.
Bert had constructed a number of via and signal trace structures in a 26 layer board and did 4-port VNA measurements of the channels which included two sets of vias and a uniform stripline interconnect between them. We all collaborated in analyzing the measurements and building simple topology based circuit models to describe them.
Two aspects of this project surprised me, both relating to how complex structures can often have very simple descriptions even to bandwidths exceeding 10 GHz.
The stripline structures were simple uniform lines, with pre-preg on one side and core laminate on the other. Using the Park Nelco dielectric calculator, Bert dialed in the glass weave construction and the resin type and the calculator spit out the Dk and Df values.
Using the built in 2D boundary element field solver in ADS, we matched the measured stripline performance with the predictions based on the material properties. (For an analysis of the accuracy of the ADS and Polar Instruments field solver based transmission line analysis tools, see the Signal Integrity Insights issue for Jan, 2009).
The agreement between the predicted Dk and what we measured was within about 1-2%. If you know the laminate composition, the materials vendors can provide very accurate Dk values. Often, the reason the actual Dk value provided by a fab house is off from what is measured is because the construction is not tracked, or a general number is provided rather than the as-fabricated construction.
Of course the dissipation factor value, 0.008, was way off from what we measured. The extracted value from the measurement was actually 0.02. I routinely find the as-measured Df in completed boards is always higher than the specified values. I have heard many other folks also report this same behavior.
The second startling result from this project is how a relatively complex structure like a differential via, going through 26 layers, with variable length through part of via stub, and with an adjacent return via can be described with so simple a model as a differential pair for the top and bottom segments.
In fact, the value of the differential impedance was very closely matched by the simple analytical estimate of twin rods. However complicated the actual physical structure might be, long vias in backplanes can behave as simple electrical structures and simple circuit models can be used to predict their behavior.
OF course, to get the simple model just from the desing, before you “build it and test it”, with the complication of clearance hole size, non function pads, thick power planes, and capture pads, a 3D field solver is an essential design tool. But, once you have the S-parameter performance, you can fit a simple differential pair model to it and use the model as a scalable tool in circuit simulations. This model allows you to simulate the behavior of any via between any layers, just given the layer position. This way, you don’t have to run 26 different 3D solutions.
This is further confirmation that Einstein’s principle, “Everything should be made as simple as possible, but not too simple,” applies very well to signal integrity analysis.
This book focuses on TDR and VNA measurement techniques and the use of S-parameters for signal integrity applications. We pulled together about 25 papers presented at DesignCon which Mike and I have authored or co-authored and supplemented them with five application notes I wrote for Agilent.
Like all of our webinars in this series, it will last about 45 minutes with 15 minutes for Q&A and be well worth your time.
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is “it depends”, it’s not always the best answer. In the case of transparent vias, the limitation is really the via stub. The correct answer is the fourth one, minimize the stub length, which 23% of you correctly answered.