I noticed that Agilent is offering a slew of live signal integrity events in the next month.

From Sept 16 – Oct 17, there is the  “High-Speed Digital Seminar – Tackling High-Speed Serial Designs“. This is a series of presentations on SI issues, like DDR, PCIe, PLLs, Gbps FPGAs and VNA and TDR techniques. If you don’t know what the TLAs and FLAs*** are, this seminar is probably for you.  This is like a what’s what in SI today. Though it is moving around to six different locations, I am disappointed that I will not be around to catch any of them! I hope Agilent makes the talks available on a CD.

On Sept 22, there is a 1-day event, Interconnect Analysis and Modeling Workshop. This looks like it covers the use of TDR, VNA, PLTS and ADS for SI applications. Lots of instrument and simulation demos for sure.

On Oct 21-24 there is a 3-day hands on workshop, Designing for Signal Integrity with ADS. This is a soups to nuts class on getting started with ADS for SI applications. For those of you who have tried to get up to speed on ADS on your own, it is a little confusing. All you need is about 30 minutes with someone showing you the style of ADS simulations and you will see it is simple and straight forward.  This class can give you a jump start to accelerate you up the learning curve of being productive with ADS.

***ok, TLA is Three Letter Acronym and FLA is Four Letter Acronym